Question: CPU read hit CPU read Send read miss message Invalid (read only) CPU read CPU write Read miss invalidate (read/write) CPU write miss CPU write

 CPU read hit CPU read Send read miss message Invalid (read

CPU read hit CPU read Send read miss message Invalid (read only) CPU read CPU write Read miss invalidate (read/write) CPU write miss CPU write hit CPU read hit Data write-back Write miss Figure 5.20 State transition diagram for an individual cache block in a directory-based system. Requests by the local processor are shown in black, and those from the home directory are shown in gray. The states are identical to those in the snooping case, and the transactions are very similar, with explicit invalidate and write-back requests replacing the write misses that were formerly broadcast on the bus. As we did for the snooping controller, we assume that an attempt to write a shared cache block is treated as a miss; in practice, such a transaction can be treated as an ownership request or upgrade request and can deliver ownership without reauiring that the cache block be fetched. 10/10/10] The directory protocol used in 5.9 (based on Figure 5.20) assumes that the directory controller receives requests, sends invalidates, receives modified data, sends modified data to requester if block was dirty, and so on Assume now that the directory controller will delegate some work to the cores For example, it will notify the exclusive owner of a modified block when some other core needs the block and will have the owner send the block to the new sharer. Specifically, consider the following optimizations and indicate what their benefits (if any) are. Also, specify how the messages will be modified (in compar- ison with Figure 5.20 protocol) to support the new change Hint: Benefits might be reduction in number of messages, faster response time, and so on a. [10] On a write miss to a shared memory block, the directory controller sends the data to the requester and instructs the sharers to send their invalidate acknowledgements directly to the requester b. [10] On a read miss to a block modified in some other core, the directory controller instructs the owner of the modified copy to directly forward the data to the requester c. [10] On a read miss to a block in shared (S) state in some other cores, the directory controller instructs one of the sharers (say, the one closest to the requester) to directly forward the data to the requester CPU read hit CPU read Send read miss message Invalid (read only) CPU read CPU write Read miss invalidate (read/write) CPU write miss CPU write hit CPU read hit Data write-back Write miss Figure 5.20 State transition diagram for an individual cache block in a directory-based system. Requests by the local processor are shown in black, and those from the home directory are shown in gray. The states are identical to those in the snooping case, and the transactions are very similar, with explicit invalidate and write-back requests replacing the write misses that were formerly broadcast on the bus. As we did for the snooping controller, we assume that an attempt to write a shared cache block is treated as a miss; in practice, such a transaction can be treated as an ownership request or upgrade request and can deliver ownership without reauiring that the cache block be fetched. 10/10/10] The directory protocol used in 5.9 (based on Figure 5.20) assumes that the directory controller receives requests, sends invalidates, receives modified data, sends modified data to requester if block was dirty, and so on Assume now that the directory controller will delegate some work to the cores For example, it will notify the exclusive owner of a modified block when some other core needs the block and will have the owner send the block to the new sharer. Specifically, consider the following optimizations and indicate what their benefits (if any) are. Also, specify how the messages will be modified (in compar- ison with Figure 5.20 protocol) to support the new change Hint: Benefits might be reduction in number of messages, faster response time, and so on a. [10] On a write miss to a shared memory block, the directory controller sends the data to the requester and instructs the sharers to send their invalidate acknowledgements directly to the requester b. [10] On a read miss to a block modified in some other core, the directory controller instructs the owner of the modified copy to directly forward the data to the requester c. [10] On a read miss to a block in shared (S) state in some other cores, the directory controller instructs one of the sharers (say, the one closest to the requester) to directly forward the data to the requester

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