Create a component for each of the operations in Table $1\mathrm{.}1$ and assign them to the corresponding opcode in the top$-$level ALU design. Make sure that each component is declared with generic bit width and is instantiated in the ALUTable $1\mathrm{.}1$: Operations with a width of $32$ bits. Ensure that the following $4-$bit opcodes are used. Each function should be its own vhd file and a seperate testbench file that completes the different test cases shown in #$2.$ Write a testbench for the ALU, similar to the one provided in the tutorial. This testbench

should be self$-$checking and use a record array to contain the necessary test cases. It should also

have user$-$friendly assert statements for debugging purposes. It should spot$-$check at least four

"generic" cases for each operation as well as the following "edge" cases: