Create / Define system called JowaSelector with three (3) input ports (A, B and C). The system also has only one (1) output J. All input and output ports are of type bit. When selecting a Jowa (A, B or C), if you just choose at least one of them, then the output J will have a value of 1 (You will have successfully a Jowa). If you choose none (between A, B and C), then you will have no Jowa (output J is 0).

-VHDL code with comments please

-Show that it works in ModelSim if possible

Example waveform:

Example test bench file:

entity JowaSelector_TB is end entity; architecture JowaSelector_TB_arch of JowaSelector_TB is -- Constant Declaration constant t_wait : time := 100 ns; -- Component Declaration component JowaSelector port (A, B, C : in bit; J : out bit); end component; -- Signal Declaration signal A_TB, B_TB, C_TB : bit; -- these signals are used to connect to the device under test (DUT) signal J_TB : bit; begin -- Component Instantiation of DUT DUT : JowaSelector port map (A => A_TB, B => B_TB, C => C_TB, J => J_TB); -- Stimulus Generation STIMULUS : process begin A_TB