Question: Create MIPS ALU by using logisim condition . Can use everything in Wiring, Base, Plexers, Gate (except even parity, odd parity and controlled buffer elements)

Create MIPS ALU by using logisim condition . Can use everything in Wiring, Base, Plexers, Gate (except even parity, odd parity and controlled buffer elements) folders. Multiplexer Can use up to 4 inputs 1 output Can use only one AddSub32 (Already created) . Can use only one Shifter32 (Already created) 32 ALU32 0 32 32 Overall diagram Op name 000x shift left logical 001x add 0100 shift right logical 101 shift right arithmetic > Sa 011x subtract 1000 and 1010 or 1100 xor 1110 nor 1001 eq 1011 ne 1101 1t V overflow V overflo Relation Table between input and output (' Don't care ) It can be seen that we already have or xor nor in Gates folder, the remaining to create are eq, ne, I and gt. Create MIPS ALU by using logisim condition . Can use everything in Wiring, Base, Plexers, Gate (except even parity, odd parity and controlled buffer elements) folders. Multiplexer Can use up to 4 inputs 1 output Can use only one AddSub32 (Already created) . Can use only one Shifter32 (Already created) 32 ALU32 0 32 32 Overall diagram Op name 000x shift left logical 001x add 0100 shift right logical 101 shift right arithmetic > Sa 011x subtract 1000 and 1010 or 1100 xor 1110 nor 1001 eq 1011 ne 1101 1t V overflow V overflo Relation Table between input and output (' Don't care ) It can be seen that we already have or xor nor in Gates folder, the remaining to create are eq, ne, I and gt
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