Question: Create the layout design for a CMOS inverter so that the switching threshold is Vod2, TpH < 100ps, tpHL < 100ps, and CL < 250fF.

Create the layout design for a CMOS inverter so that the switching threshold is 

Vod2, TpH < 100ps, tpHL < 100ps, and CL < 250fF. Vpp = 2.0V, V n = 1V.pl = 0.3V, tox = 8nm, and 2X = 0.5μm.


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