D$16\mathrm{.}53$ Figure P$16\mathrm{.}53$ shows a classic CMOS logic circuit. $($a$)$ What is the logic function performed by the circuit? $($b$)$ Design the NMOS network. $($c$)$ Determine the transistor $\frac{W}{L}$ ratios to provide symmetrical switching times at twice the switching speed of the basic CMOS inverter with $(\frac{W}{L}{)}_n=2$ and $(\frac{W}{L}{)}_p=4.$