D$16\mathrm{.}56$ Consider the classic CMOS logic circuit in Figure P$16\mathrm{.}56.($a$)$ What is the logic function performed by the circuit? $($b$)$ Design the PMOS network. $($c$)$ Determine the transistor $\frac{W}{L}$ ratios to provide symmetrical switching times equal to the basic CMOS inverter with $(\frac{W}{L}{)}_n=2$ and $(\frac{W}{L}{)}_p=4.$

Figure P$16\mathrm{.}55$

Figure P$16\mathrm{.}56$