d

4. Consider a paged virtual memory system that employs 32-bit virtual addresses a two- level page table. The page size is 212 bytes. Each page table entry requires 8 bytes. How many entries are there in the first-level page table and what is the total size of this table, in bytes? Sketch the virtual to physical address translation process. Be sure to clearly indicate exactly which bits of the address are used at each stage in the process. a. b. 4. Consider a paged virtual memory system that employs 32-bit virtual addresses a two- level page table. The page size is 212 bytes. Each page table entry requires 8 bytes. How many entries are there in the first-level page table and what is the total size of this table, in bytes? Sketch the virtual to physical address translation process. Be sure to clearly indicate exactly which bits of the address are used at each stage in the process. a. b