Deep Pipelines $(50$ points$)$

Consider an unpipelined processor where it takes $7$ns to go through the circuits and $0\mathrm{.}2$ns for the latch overhead. Assume that the Point of Production and Point of Consumption in the unpipelined processor are separated by $3$ns$.$ Assume that one$-$third of all instructions do not introduce a data hazard and two$-$thirds of all instructions depend on their preceding instruction. What is the throughput of the processor $($in BIPS$)$ for $($i$)$ an unpipelined processor, $($ii$)$ a $10-$stage pipeline, and $($iii$)$ a $20-$stage pipeline?