Depending on which implementation variant is selected for each function, the embedded system

can consist of the hardware components ASIC$\_1$ to ASIC$\_4,$ FPGA, processor $1$ and processor

As a simplification, you can assume that the cost, power consumption and processing time

in the overall system is the result of adding the values of these properties for the chosen

implementation variants.

a$)$ Determine processing time, power consumption and cost of an embedded system that

i$.$ is fully implemented in SW on processor $1,$

ii$.$ is fully implemented in SW on processor $2,$

iii. is fully implemented as an ASIC.

b$)$ Write a small program that can create a list of all possible implementation variants for

the embedded system. How many implementation variants exist? Moreover, the

program should calculate the cost, processing time, and power consumption for each

possible variant of an embedded system.

c$)$ Extend the program, such that it determines from all solutions in $($b$)$ all the Pareto$-$

optimal solutions!

d$)$ Which implementation variant would be the cheapest in terms of costs if the processing

of all functions should be completed within $200ms$ and the power consumption should

not be higher than $100mA?$