Derive a minimal state table for a Mealy model FSM that acts as a sequence checker. During four consecutive clock pulses, a sequence of four values of the signal x is applied. The FSM will output R = 1 when it detects that the previous 4 bit sequence was either 0111 or 0101. At all other times, including when the previous sequence was not those described previously, R = 0.

After the fourth clock pulse, the circuit resets itself and is ready to take in the next 4 bit sequence.

Input Pins

Your input pins are the input into the FSM x, and the clock Clock. There is also an input named Enable. Hook this up to the enable pins on your flip flops.

Output Pins

Your output pin is the output of the FSM R.