Description: Use the Xilinx ISE (Project Navigator) to implement a datapath to support R-type operations (namely...

   

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Description: Use the Xilinx ISE (Project Navigator) to implement a datapath to support R-type operations (namely "add", "sub", and "or" operations from the subset I introduced in the class). The components you need to implement are the register file that contains 8 8-bit registers and an 8-bit adder (since subtraction can be implemented by negating the operand before being added). Note that in the lecture, each register can store a 32 bit word. However, to simplify the design, this lab only requires you to implement 8- bit registers. You should take the following steps to complete this lab. 1. Build the register file by using various ISE components. Create testbench waveforms to verify your design. 2. Build an 8-bit ALU (you already know how to build a half-adder and a full adder, right?). Create testbench waveforms to verify your design. 3. Assemble the different components to implement the datapath for R-type operations. Be careful to make correct connections (refer to the figure below). RegWr Rd Rs Rt busA Rw Ra Rb bus W 8 32 32-bit 8 Registers Clk busB 8 + ALUctr 8 Result Description: Use the Xilinx ISE (Project Navigator) to implement a datapath to support R-type operations (namely "add", "sub", and "or" operations from the subset I introduced in the class). The components you need to implement are the register file that contains 8 8-bit registers and an 8-bit adder (since subtraction can be implemented by negating the operand before being added). Note that in the lecture, each register can store a 32 bit word. However, to simplify the design, this lab only requires you to implement 8- bit registers. You should take the following steps to complete this lab. 1. Build the register file by using various ISE components. Create testbench waveforms to verify your design. 2. Build an 8-bit ALU (you already know how to build a half-adder and a full adder, right?). Create testbench waveforms to verify your design. 3. Assemble the different components to implement the datapath for R-type operations. Be careful to make correct connections (refer to the figure below). RegWr Rd Rs Rt busA Rw Ra Rb bus W 8 32 32-bit 8 Registers Clk busB 8 + ALUctr 8 Result