Question: Design a 3-bit synchronous up/down counter. using SR flipflops I asked this question before ,but the answer was not correct. Here is the truth table
Design a 3-bit synchronous up/down counter. using SR flipflops
I asked this question before ,but the answer was not correct.
Here is the truth table that I made ,but whenever I made the K-map and made the circuit, it does not give the right count.X =0 means count down. X=1 count up

0101 010 - 0101 0101 1010 1010 1010 1010 X001 X001 0X10 0X10 01x0 100 100X XXX0 000 - 0XXX 1000 0001 XXX0 1000 0XXX 1010 1010 1010 101 0 01 10 0110 1001 1001 0001 1000 0111 0101 0101 0101 0101 0011 0011 0011 0011
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