Design a circuit that takes a $4-$bit binary number as an input and outputs a $1$ if the number is

between $0$ and $9.$ It outputs a $0$ otherwise.

To help with this problem look at the following truth table. Fill in the following truth table.

You will need to convert the $4-$bit number represented by $a_3{a}_2{a}_1{a}_0$ into a decimal number to

know whether the output should be a $1$ or $0.$ Then make a K$-$map and create a simplified

circuit from the K$-$map.

Design a circuit that compares two $2-$bit numbers $A(a_1{a}_0)$ and $B(b_1{b}_0).$ There will be $3$

outputs from this combinational circuit, $S_2,S_1,$ and $S_0.$ The three outputs should have the

following behavior

$a_1{a}_0{b}_1{b}_{0}A(10{)}_2=2B(11{)}_2=3S_0=1a_1{b}_1{S}_2{S}_{1}A,so{S}_0=1$ and the other two outputs are $0.$ You will then have $3K-$maps $to$

create and $3$ circuits $to$ create. Try and see $if$ you can use $as$ few gates $as$ possible. For

instance, suppose you need $a_1{b}_1$ for both $S_2$ and $S_1.$ Your final design should not contain two

sets $of$ AND gates. You should have a single AND gate that $is$ used for both outputs. $If$ you

need additional help, please reach out $to$ your instructor.$S_2=1ifA>B$ and $0$ otherwise.

$S_1=1ifA=B$ and $0$ otherwise.

$S_0=1ifA$

You will need $to$ create a truth table like the one above. However, $in$ this case you will have $a_1$

$a_0{b}_1{b}_0$ for the input columns. You will have $3$ output columns. Then you will need $to$ convert

each $of$ the two numbers $to$ decimals $to$ determine what the output should $be.$ For example,

suppose you are looking $at$ row $1011.$ This would mean that $Ais(10{)}_2=2$ and $Bis(11{)}_2=3.In$

this case $A,so{S}_0=1$ and the other two outputs are $0.$ You will then have $3K-$maps $to$

create and $3$ circuits $to$ create. Try and see $if$ you can use $as$ few gates $as$ possible. For

instance, suppose you need $a_1{b}_1$ for both $S_2$ and $S_1.$ Your final design should not contain two

sets $of$ AND gates. You should have a single AND gate that $is$ used for both outputs. $If$ you

need additional help, please reach out $to$ your instructor.