Design a logic module to multiply an $8-$bit binary number A $[0$:$7]$ by a $4-$bit

binary number N $[0$:$3].$ The multiply is started when M is asserted. The

output F is asserted when the multiply is completed and the product P $[0$: $15]$

is available. The outputs need to remain valid until the next multiply

command is given. Assume M is valid for several of your clock cycles and

then is de$-$asserted.

Implement the multiply using repeated addition of A to form partial products.