Design a sequential odd parity calculating and odd parity checking device as shown in the figure below. For this question you can use any flip$-$flop with process and if statements.

The input data is given to system with each clock rising edge. The parity that should be compared with calculated value is on "parityin" input. This system calculates the odd parity bit and outputs the result on "parityout" output. This value is compared with the value given to the system originally and if the parityin and parityout are equal $($i$.$e$.$ parity checks out$)$ then the paritychk is $\text{'}1\text{'}.$

FSM graph for parity calculator with Moore model is given below.

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Data$1$: $101101010110$ Parityin$1$:$1$

Data$2$: $111100101101$ Parityin$2$:$1$

Data$3$: $000000001010$ Parityin$3$:$0$

Data$4$: $111111111111$ Parityin$4$:$0$