Question: Design a simple ALU with 8-bit operand, 3-bit opcode and 8-bit result. Provide comments throughout your code. Creating a test bench to test your design

Design a simple ALU with 8-bit operand, 3-bit opcode and 8-bit result. Provide comments throughout your code. Creating a test bench to test your design for one operands combination and test you 8 functions of the ALU. In your report, provide Verilog code for each module, test bench, and timing diagram or $monitor outputs illustrating correct functionality.

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