Design a simple processor with the following requirements:

Contain $16$ registers $($each of them are $8$ bit wide$)$

Be able to load any of the $16$ registers with an immediate $8-$bit value $($i$.$e$.,$ move $8-$bit

immediate value to register$)$

Be able to add any two registers $($src$1+$ src$2)$ and have the result stored back to src$1$

Be able to subtract any two registers $($src$1-$ src$2)$ and have the result stored back to src$1$

Be able to leave all register values unchanged $($NOP: No Operation$)$

Suggested steps:

Identify the total number of instructions that are needed to perform the above operations.

Identify how many bits would be needed for "input$1\_$sel", selecting the register for

processing.

Identify how many bits would be needed for "input$2\_$sel" for selecting the $2$nd register.

Identify how many bits would be needed for "opcode" selecting the operation performed by

Arithmetic Logic Unit $($ALU$).$

Identify how many bits would be needed for "output$\_$sel" $($selecting the output register to be

written into.

Identify anything else needed in the instruction's machine code for the processor to perform

the required operations.

The project document in pdf should contain the following sections:

A$.$ Requirements: Describe the requirements of the processor

B$.$ Design: Describe the architecture of the processor. Using full sentences and high$-$level

diagram, use the information gathered from the above questions to describe how the

registers are connected to the ALU unit and back to the registers. It is not necessary to

show all the details in the diagram; it is sufficient to show a couple of registers and use $"..."$

to indicate the presence of the remaining registers. It is not necessary to show details of

add or subtract operation; each of them can be showed as a block instead. Use mux block

and decode block as described earlier in the class.

C$.$ Instruction Fields: List all the fields needed in the processor $($input$1\_$sel, input$2\_$sel,

opcode, output$\_$sel, etc.$)$ and the bit width needed for each field. Provide explanation of the

bit width chosen for each field. Identify the total bit width of each instruction in the

processor $($assume that each instruction contains all fields even if some of the fields are not

used by the instruction$).$

D$.$ Instruction Set Reference: Create a subsection for each instruction and in each subsection,

provide opcode for the instruction and how the Instruction Fields are used by the

instruction. If an Instruction Field isn't needed for an instruction, please state it$.$

Example is shown below:

D$.1$ XOR $-$ Exclusive$-$OR operation

opcode for this instruction is $0($note that each instruction should have an unique opcode$)$

input$1\_$sel field is used to select the first input

input$2\_$sel field is used to select the second input

immediate field is not used

etc. Show a high level diagram please. Some comments: $-$ You should have the opcode signal used to select between the inputs of the mux on the right$-$hand side of the page $($deciding whether to perform add, subtract, etc.$)-$ Determine how you would execute the NOP instruction and provide explanation in the last section about how the instruction fields would be configured. As mentioned in class, there are a variety of ways to implement NOP; you can try to spend some time on how you would implement one of them: $(1)$ Enable should be $0$ for all registers by using an extra field in instruction or $(2)$ A register's value should be modified written back to the same register without modification