Design a single$-$input $\backslash ((\backslash$mathrm$\{$X$\})\backslash ),$ single$-$output $\backslash ((\backslash$mathrm$\{$Y$\})\backslash )$ synchronous sequence detector. Every time a pattern of sequence $\backslash (0101\_\{2\}\backslash )$ is detected, this sequence detector produces an output $\backslash ($ Y$=1\backslash )$; otherwise, $\backslash ($ Y$=0\backslash ).$ You may assume that overlapping sequences are allowed. Use JK flip flops to realise this system.

Your design flow should consist of the following elements

$-$ State diagram

$-$ State table

$-$ Assign state codes

$-$ Transition$/$output table for JK flip flops

$-$ Karnaugh maps $($and minimization$)$

$-$ Circuit diagram

$-$ Build and test your design

$-$ Complete timing diagram

Circuit for manually clocking the JK flip flops $($the capacitor is used to eliminate the effects of switch contact bounce$)$