design a synchronous sequential circuit that receives a serial input X that produces 1 when the input sequence is either {1001} (i.e., 1 followed by 0 followed by 0 followed by 1) or {0101} (i.e., 0 followed by 1 followed by 0 followed by 1) assuming overlapping sequences. Assume the existence of an asynchronous reset input to reset the machine to a reset state

1) Derive the state diagram of the circuit assuming a mealy model

2) Implement your design using D flip flops with minimal number of flip flops and combinational logic

Examples: Input X 1 001010 1001001 Output Z000 1010 1001001