Design an ALU with $4-$bit inputs with the following operations in VHDL$.$ You also need to provide schematic diagrams for your design as a part of your pre$-$lab in your logbook$.$ After compiling your design, simulate it using Altera simulator to verify your design. $($Hint: Use your lecture notes as reference$)$

$\backslash$table$[[$A$-$B$],[$A$+$B$],[$A$-1],[$A$+1],[$A AND B$],[$A XOR B$],[$NOT A$],[$NOT B$]]$