Question: design an n-bit program counter(PC) that has the following functions a)it is cleared to 0 when the asynchronous reset is asserted b)it is loaded a

design an n-bit program counter(PC) that has the following functions

a)it is cleared to 0 when the asynchronous reset is asserted

b)it is loaded a new value in parallel when the PCload is asserted

c) it is incremented by 1 when the PCinc is asserted

with verilog plz

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