Design and draw a synchronous sequential circuit with one serial input SI and 3 outputs V, r and ro. The circuit V repeatedly receives 4-bit binary numbers B at the serial input, SI ro LSB first. If the 4-bit binary number is received completely, 11 CLK V=1 and riro is the result of [ ] Otherwise, V= 0 and riro is arbitrary. You can use One circuit as in part a. 11. One unidirectional 4-bit shift register with parallel load: SI Shift if L = 0 and Load if L = 1. L One D flip flop, initially zero. CLK SS SS A minimum number of additional gates. Complements of the variables are not available. Logic 0 and 1 are available. 10 Design and draw a synchronous sequential circuit with one serial input SI and 3 outputs V, r and ro. The circuit V repeatedly receives 4-bit binary numbers B at the serial input, SI ro LSB first. If the 4-bit binary number is received completely, 11 CLK V=1 and riro is the result of [ ] Otherwise, V= 0 and riro is arbitrary. You can use One circuit as in part a. 11. One unidirectional 4-bit shift register with parallel load: SI Shift if L = 0 and Load if L = 1. L One D flip flop, initially zero. CLK SS SS A minimum number of additional gates. Complements of the variables are not available. Logic 0 and 1 are available. 10