Design Constraints:

$($Note: Every time you cannot meet ane of the canstraints you may lase a few paints.$)$

Try not to use more than $4$ Flip$-$Flops of ary type.

Try to minimize the discrete gate count. State what you did in arder to minimize the gate count.

The system can be a single FSM or use any number of subsystems ffor example one subsystem for each

sequence to be detected.

You may use more Flip Flops, if needed, when providing alternative design solutions. In such case discuss

pros and cons.

Recall that no overlap is allowed when detecting ono twice.

You can use Moore or Mealy F$5$Ms$.$