Design the adder circuit with only one op$-$amp and a few resistors so that the output voltage $v_o$ is the weighted sum of two input voltages, $v_0=3v_1+5v_2,$ where $v_1$ and $v_2$ are input voltage sources. You are not allowed to use negative input voltages. Verify your circuit with PSPICE simulation. $(40$pt$)$

Positive and negative powers are $5$ V and $-5$ V $,$ respectively.

Apply the input signals as follows.

$v_1$:$-0\mathrm{.}5V$ to $0\mathrm{.}5$ V pulse with $0\mathrm{.}5-kHz$ frequency

$v_2$:$0-V$ offset, $0\mathrm{.}05-V$ amplitude, and $4-kHz$ frequency

Run PSPICE with the transient simulation for $5$ ms $.$