Determine whether the following signal assignment is syntactically correct. If not,

use the proper conversion function and type casting to correct the problem.

library ieee ;

use ieee, std$-$logic$-1164.$ all ;

use ieee $.$ numeric$-$std$.$ all ;

signal sl$,$ s$2,$ s$3,94,$ s$5,$ s$6,$ s$7$: std$-$logic$-$vector$(3$ downto $0)$;

signal ul$,$ u$2,$ u$3,$ u$4,$ u$5,$ u$6,$ u$7$: unsigned$(3$ downto $0)$;

signal sg: signed$(3$ downto $0)$ ;

U$1<=2$#$0001$#;

u$2(=$ u$3$ and u$4$;

U$5<=$ sl $+1$;

u$6<=$ u$3-+$ u$4+3$;

u$7<=($others$=>$l$>$; s$2<=$ s$3+$ s$4-1$;

s$5<=($others$=>$l$)$;

s$6<=$ u$3$ and u$4$;

sg $<=$ u$3-1$;

s$7<=$ not sg;