Digital Logic $7\mathrm{.}6$ The ASM chart in Figure $7\mathrm{.}17,$ which describes the bit$-$counting circuit, includes Moore$-$type outputs in states $S1,S2,$ and $S3,$ and it has a Mealy$-$type output in state $S2.$

$($a$)$ Show how the ASM chart can be modified such that it has only Moore$-$type outputs in state $S2.$

$($b$)$ Give the ASM chart for the control circuit corresponding to part $($a$).$

Figure $7\mathrm{.}17$ ASM chart for the pseudo$-$chlde in Figure $7\mathrm{.}16.$