DIGITAL LOGIC

Q (2): (10 MARKS) 2. The same system above will output now two binary signals (A, B). If signal (B) was True another system will be activated which contain a Full adder (C, D, E) and the result is forwarded to (2-to-1) MUX. The selector bit of the MUX is a signal arrive from (A). If (A) is not equal to the MUX output, then the result should be true. Using MATLAB Simulink, implement the system (minimize the number of gates as much as possible): DS B Q (3): (10 MARKS) 1. Using MATLAB Simulink, deploy the whole system in Q (1) using NAND gates only. (Show your MATLAB work) 2. Using MATLAB Simulink, deploy the whole system in Q (2) using NOR gates only. (Show your MATLAB work)