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$$Access pattern$$ is defined as the order in which the elements within a data structure are referenced. The access pattern can have a major impact on performance when using a memory system employing caches.

Consider a system with a direct$-$mapped D$-$cache $($data cache$)$ containing $4096$ lines. Each line is $256$ bytes in size. The D$-$cache is initially empty. The matrix X with $256$ rows and $256$ columns is to be processed. The matrix resides in memory starting at address $0$x$10040000.$ Assume that each matrix element is $32$ bits. Also assume registers are used for the array indices and no code optimizations are performed.

a$)$ If the matrix is stored in row major order, what is the miss ratio for the data cache based on the matrix accesses made by the following code?

for $($i$=0$; i$<256$; i$=$i$+2$;$)\{$

for $\{$j$=0$; j$<256$; j$=$j$+2\}$

X$[$i$,$j$]=$ X$[$i$,$j$]+$ X$[$i$+1,$j$]$;

$\}$

$\}$

Each row contains $2564-$byte elements and are $256*4=1024$ bytes in size.

b$)$ If the matrix is stored instead in column major order, what is the hit ratio for the cache based on the matrix accesses made by the following code?

for $($j$=0$; j$<256$; j$=$j$+2$;$)\{$

for $\{$i$=0$; i$<256$; i$=$i$+2\}$

X$[$i$,$j$]=$ X$[$i$,$j$]+$ X$[$i$+1,$j$]$;

$\}$

$\}$