Execution of a $1,000,000-$instruction program takes $2\mathrm{.}5$ ms on a $2\mathrm{.}5$ GHz core. The hardware monitor reports a cache miss ratio of $6\%$ for the application. Main memory access takes on average $80$ ns$,$ while cache access has a latency of $800$ ps$.$ Given that all ALU instructions are executed effectively in a single clock cycle, calculate the following. a$.$ The fraction of application instructions that performed ALU operations. b$.$ If the core has a $16$ KB cache and doubling the cache size decreases the miss rate by $1\%$ for that particular application, what would be the required cache size $($in powers of $2)$ to cut the execution time in half? c$.$ What would the program runtime and resulting speedup be if all accessed data fits in the cache?