Exercise $1$

A byte$-$addressable computer has a small data cache

capable of holding eight $32-$bit words. Each cache block

consists of one $32-$bit word. When a given program is

executed, the processor reads data sequentially from the

following hex addresses:

$200,204,208,20C,2F4,2F0,200,204,218,21C,24C,2F4$

This pattern is repeated four times.

$($a$)$ Assume that the cache is initially empty. Show the

contents of the cache at the end of each pass through the

loop if a direct$-$mapped cache is used, and compute the hit

rate.

Exercise $1$

$($b$)$ Repeat part $($a$)$ for an

associative$-$mapped cache that uses the LRU

replacement algorithm.

$($c$)$ Repeat part $($a$)$ for a four$-$way

set$-$associative cache.A byte$-$addressable computer has a small data cache

capable of holding eight $32-$bit words. Each cache block

consists of one $32-$bit word. When a given program is

executed, the processor reads data sequentially from the

following hex addresses:

$200,204,208,20$C$,2$F$4,2$F$0,200,204,218,21$C$,24$C$,2$F$4$

$$ This pattern is repeated four times.

$($a$)$ Assume that the cache is initially empty. Show the

contents of the cache at the end of each pass through the

loop if a direct$-$mapped cache is used, and compute the hit

rate.

Exercise $1$

$($b$)$ Repeat part $($a$)$ for an

associative$-$mapped cache that uses the LRU

replacement algorithm.

$($c$)$ Repeat part $($a$)$ for a four$-$way

set$-$associative cache.

I got $31\mathrm{.}25\%,75\%$ and $62\mathrm{.}25\%$ for a$,$b$,$c respectively. However, doesn't set$-$associative have a higher hit rate than direct mapping normally. Please provide step by step details with explanation, thank you!