Question: Exercise 2 1 - What would be the value in TPM 0 _ MOD of the KL 2 5 microcontroller to yield the maximal sampling
Exercise
What would be the value in TPMMOD of the KL microcontroller to yield the maximal
sampling rate of its ADC converter using TOF of TPM module for triggering the start of the
ADC conversion. Assume that the ADCK clock is selected to be its Bus clock, the frequency of
which is set to MHz
Design the circuit conditioning of the ADC module if the analog signal ranges from mV to
mV vref V and Vref V and that the minimum quantization error is sought.
Provide the proper values of the associated KL control registers corresponding to the above
constraint assuming that:
a The analog signal is fed to channel of the KL ADC module
b The analog signal is a differential signal ie not single ended
c Vref Volts and vref V are used
d Number of bits sought in ADCR is signed bits
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