Exercises Exercise 5.1 An eighth order IIR filter is designed using the fdatool of MATLAB. The four second order parallel sections of the filter are given below. The coefficients of the first order numerators are: 1 1 1 1 0.6902 -0.1325 1.7434 0.0852 The coefficients of the corresponding second order denominator of the four second order filters are: 1 1 1 1 -1.0375 -0.6083 -1.3740 -0.7400 0.7062 0.9605 0.5431 0.8610 Convert the coefficients in appropriate 16 bit fixed point format. Code the design using FDA in RTL Verilog. Use mathematical operators for multiplication and addition in the code. Test your design for functional correctness. Synthesize your design of two families of FPGAs that support 248 Digital Design of Signal Processing Systems 18 x 18 bit multipliers and DSP48 blocks. Select the option in the synthesis tool to use these blocks. Compare your results for better timing and area. Exercises Exercise 5.1 An eighth order IIR filter is designed using the fdatool of MATLAB. The four second order parallel sections of the filter are given below. The coefficients of the first order numerators are: 1 1 1 1 0.6902 -0.1325 1.7434 0.0852 The coefficients of the corresponding second order denominator of the four second order filters are: 1 1 1 1 -1.0375 -0.6083 -1.3740 -0.7400 0.7062 0.9605 0.5431 0.8610 Convert the coefficients in appropriate 16 bit fixed point format. Code the design using FDA in RTL Verilog. Use mathematical operators for multiplication and addition in the code. Test your design for functional correctness. Synthesize your design of two families of FPGAs that support 248 Digital Design of Signal Processing Systems 18 x 18 bit multipliers and DSP48 blocks. Select the option in the synthesis tool to use these blocks. Compare your results for better timing and area