Question: Extend the Figure 9.14b table to 16 rows, indicating how to recode three multiplier bits: i + 2, i + 1, and i. Can all

Extend the Figure 9.14b table to 16 rows, indicating how to recode three multiplier bits: i + 2, i + 1, and i. Can all required versions of the multiplicand selected at position i be generated by shifting and/or negating the multiplicand M? If not, what versions cannot be generated this way, and for what cases are they required?

Figure 9.14b:

https://www.dropbox.com/s/tuu5lfzwgmg7mg6/chegg9.12.png?dl=0

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