Fall 2018 CIS360: Info Tech Hardware & So 4. Fetch-Decode cycle Given the following state of the memory and registers (all values are decimal): Memory Value Address Register Value 255 778 779 780 R1 R2 R3 R4 778 255 2 522 a) (5 points) The following set of instructions are executed. Indicate the change in memory location/registe after every instruction that actually executes. 230 MUL R4, R4, #3 231 SUB R1, R1, R4 232 BRZ 700 233 BR 701 700 LD R4, 1(R2) 701 SD R3, (778)