FE ELECTRICAL AND COMPUTER

$93.$ A microprocessor $($ p$)$ uses a $16-$bit address bus and an $8-$bit data bus. The address bus lines are labeled $A_{15}$ to $A_0,$ where $A_{15}$ is the most significant address bit and $A_0$ is the least significant address bit. The microprocessor generates an active$-$low address strobe $($AS$)$ at the beginning of each memory access cycle to indicate that a valid address has been placed on the address bus. The AS signal is asserted for the entire memory access cycle.

In a certain application of the $p,$ the three most significant address bits $(A_{15}-A_{13})$ are used as inputs to a $3-$of$-8$ decoder to generate chip$-$select signals $(C{S}_0-C{S}_7).$ The chip$-$select signals are used to enable an EPROM memory device whose address lines are tied directly to the lower $13$ address lines $(A_{12}-A_0)$ of the $p.$ The EPROM's output lines are enabled whenever its enable input $($EN$)$ is pulled low. A figure of the microprocessor described above and the decoder truth table are shown on the opposite page.

The range of addresses $($expressed in hexadecimal$)$ to which the EPROM in the figure will respond is most nearly:

A$.,0000$ to $1FFF$

B$.4000$ to $5FFF$

C$.8000$ to $9FFF$

D$.$ E$000$ to FFFF