The first microprocessor had a$($n$).$

$1$ bit data bus

$2$ bit data bus

$4$ bit data bus

$8$ bit data bus

A $20-$bit address bus can locate.

$1,048,576$ locations

$2,097,152$ locations

$4,194,304$ locations

$8,388,608$ locations

In $8086$ microprocessor the following has the highest priority among all type interrupts?

NMI

DIV $0$

TYPE $255$

OVER FLOW

The instruction, MOV AX$,[2500$H$]$ is an example of

immediate addressing mode

direct addressing mode

indirect addressing mode

register addressing mode

In $8086,$ Example for Non maskable interrupts are

TRAP

RST$6\mathrm{.}5$

INTR

RST$6\mathrm{.}6$

Which bus is bidirectional?

Address bus

Control bus

Data bus

None of the above

The $8051$ has $\_\_\_\_\_\_\_\_16-$bit counter$/$timers$.$

$1$

$2$

$3$

$4$

The $8051$ can handle $\_\_\_\_\_\_\_\_$ interrupt sources.

$3$

$4$

$5$

$6$

Assume that, a sting length of $9$bytes are available from starting address $1000$H to ending address $1009$H$.$ If DF is set to $1$ then what value should be loaded in the index register?

$1000$H

$1009$H

$0000$H

$9000$H

The instruction, MOV AX$,1234$H is an example of

register addressing mode

direct addressing mode

immediate addressing mode

based indexed addressing mode

Which method bypasses the CPU for certain types of data transfer?

Software interrupts

Interrupt$-$driven I$/$O

Polled I$/$O

Direct memory access $($DMA$)$

The I$/$O ports that are used as address and data for external memory are:

ports $1$ and $2$

ports $1$ and $3$

ports $0$ and $2$

ports $0$ and $3$

The result of MOV AL$,65$ is to store

store $01000010$ in AL

store $42$H in AL

store $40$H in AL

store $01000101$ in AL

The internal RAM memory of the $8051$ is:

$32$ bytes

$64$ bytes

$128$ bytes

$256$ bytes

MOV A$,$ @ R$1$ will:

copy R$1$ to the accumulator

copy the accumulator to R$1$

copy the contents of memory whose address is in R$1$ to the accumulator

copy the accumulator to the contents of memory whose address is in R$1$

Access time is faster for

ROM

SRAM

DRAM

ERAM

If MN$/$MX$\text{'}$ is low the $8086$ operates in mode

Minimum

Maximum

both $($A$)$ and $($B$)$

medium

$8086$ and $8088$ contains$\_\_\_\_\_\_$ Transistors

$29000$

$24000$

$34000$

$54000$

The instruction, JMP $5000$H:$2000$H; is an example of

intrasegment direct mode

intrasegment indirect mode

intersegment direct mode

intersegment indirect mode

Which of the following is not an arithmetic instruction?

INC $($increment$)$

CMP $($compare$)$

DEC $($decrement$)$

ROL $($rotate left$)$

In $8086$ microprocessor one of the following statements is not true?

coprocessor is interfaced in max mode.

coprocessor is interfaced in min mode.

I $/$O can be interfaced in max $/$ min mode.

supports pipelining

Multiplexed function of port pin P$3\mathrm{.}4$ in the $8051$ is:

Timer $0$

Timer $1$

interrupt $0$

interrupt $1$

Address line for TRAP is$?$

$0023$H

$0024$H

$0033$H

$0099$H

In a minimum mode there is a on the system bus

single

double

multiple

triple

In which year, $8086$ was introduced?

$1978$

$1979$

$1977$

$1981$

The pin is used to select direct command word

A$0$

D$7-$D$6$

A$12$

AD$7-$AD$6$

The internal RAM memory of the $8051$ is:

$32$ bytes

$64$ bytes

$128$ bytes

$256$ bytes

ALE stands for

address latch enable

address level enable

address leak enable

address leak extension

In $8086$ the overflow flag is set when.

the sum is more than $16$ bits.

signed numbers go out of their range after an arithmetic operation.

carry and sign flags are set.

subtraction

During a read operation the CPU fetches $\_\_\_\_\_\_\_\_$

a program instruction

another address

data itself

all of the above