Figure B$1$ illustrates the hardware required to perform the addition of two binary

coded decimal $(BCD)$ numbers, $x$ and $Y.$ A binary adder adds the least

significant $BCD$ digits. If the sum, $S_0,$ is greater than $9,$ an adder adds $6$ to yield

the corrected sum, $Z$ digit $0,$ and carry bit, $C.$

c$)$ Define the valid range of the number $S_0$ in hexadecimal.

d$)$ Design a logic circuit with output $V$ to indicate whether $S_0$ requires

correction.

e$)$ Design a minimal logic circuit to include full and half adder circuit

blocks to add $0110$ to $S_0$ if $V=1$ and $0000$ if $V=0.$ The circuit should

output the signals $C$ and $Z$ digit $0.$