Question: For my Advance Digital Logic class we have to do a design project. It must be writen in verilog. Any one have any ideas. Would

For my Advance Digital Logic class we have to do a design project. It must be writen in verilog. Any one have any ideas. Would love the help.For my Advance Digital Logic class we have to do a design

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Overview: Your group is tasked to create and complete a design of some digital system of your choice (with my approval). The difficulty of the project should be more difficult than a single homework assignment (which has been similar to mini-projects in themselves). You must take your design from specification, to design, to RTI, to simulation, and finally to synthesis. Your topic must stay the same, but the specifics of what you perform may change as you work through your project. On the last day class, you will present your project, including your specifications, design, and final completion. Here are a few guidelines: Topic: You should choose some fun and/or interesting so that your group is interested in the completion. Some examples are: performing a design of part of a processor, or even a simple processor, an fast-Fourier transform (FFI) unit, an advanced encryption standard (AES) engine, a Viterbi decoder, a motion estimator, a floating point unit, a controller for a complicated system, perhaps something you have implemented in a programing class, vector computational unit, memory controller, communication interface such as SPI, USB, or some other packet based communication system, a network on chip (NoC) system, etc. Duplicated topics will not be allowed, and will be approved based on when the proposal was submitted. Partial overlap is ok at the discretion of the instructor. Therefore, you might think of a backup topic if someone else already proposed doing your first choice. Overview: Your group is tasked to create and complete a design of some digital system of your choice (with my approval). The difficulty of the project should be more difficult than a single homework assignment (which has been similar to mini-projects in themselves). You must take your design from specification, to design, to RTI, to simulation, and finally to synthesis. Your topic must stay the same, but the specifics of what you perform may change as you work through your project. On the last day class, you will present your project, including your specifications, design, and final completion. Here are a few guidelines: Topic: You should choose some fun and/or interesting so that your group is interested in the completion. Some examples are: performing a design of part of a processor, or even a simple processor, an fast-Fourier transform (FFI) unit, an advanced encryption standard (AES) engine, a Viterbi decoder, a motion estimator, a floating point unit, a controller for a complicated system, perhaps something you have implemented in a programing class, vector computational unit, memory controller, communication interface such as SPI, USB, or some other packet based communication system, a network on chip (NoC) system, etc. Duplicated topics will not be allowed, and will be approved based on when the proposal was submitted. Partial overlap is ok at the discretion of the instructor. Therefore, you might think of a backup topic if someone else already proposed doing your first choice

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