For the following assume that values A, B, C, D, E and F reside in memory. Also assume that instruction operation codes are represented in 8 bits, memory addresses are 48 bits, data size is 64 bits, and register addresses are 5 bits. For each instruction set architectures (will follow), how many addresses, or names, appear in each instruction for the code to compute C = A + B, and what is the total code size? Instruction set architectures: Stack: Push A, Push B, Add, Pop C Accumulator: Load A, Add B, Store C Register (register-memory): (Load R1, A), (Add R3, R1, B), (Store R3, C) Register (load-store): (Load R1, A), (Load R2,B), (Add R3, R1, R2), (Store R3,C) *parentheses are only to show separation between items