For the following memory access pattern, estimate when each memory access completes for two different scheduling mechanisms: openpage policy and close$-$page policy. You are allowed to re$-$order requests already waiting in the memory controller. The access pattern only specifies the row being touched. All accesses are to the same bank. Assume that bus latencies are zero. Assume that the bank is already precharged at time $0.$ Assume that precharge takes $20$ ns $,$ loading a row buffer $($Activate$)$ takes $20$ ns $,$ and cache line transfer to output pins $($Column$-$Rd$)$ also takes $20$ ns $($in other words, a row buffer hit takes $20$ ns $,$ an empty row access takes $40$ ns$,$ and a row buffer conflict takes $60$ ns $).$