Given a $64M1$ DRAM. Each memory cell needs to be refreshed every $50ms$ and

the refresh time is $40$ns$.$ Determine

$($i$)$ the number of rows and columns in the memory array configuration,

$($ii$)$ the refresh period for each row,

$($iii$)$ the number of refresh cycles which can be accommodated within one refresh

period, and

$($iv$)$ briefly discuss the reason of arranging the memory array in a square.