Question: Given the following ASM Chart: TO 0 $ (1 T1 B N + + + laputi Input2 Inputs T2 0 T3 Z 0 14 SHR

Given the following ASM Chart: TO 0 $ (1 T1 B N + + + laputi Input2 Inputs T2 0 T3 Z 0 14 SHR B by 1 bit SHR Nby 1 bit TS O XOR SHR: Shin Right A: 16 bits Storage Register B.Ni 16 bits Shift Registers No: The Least Significant Bit of N Z: The zero signal is set to (1) when the value of shift register Nis zero 1) Design the data processor (You have to show the data source and the control signals for each component. (10 Points) 2) Design the controller using one flip-flop per state
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