Given the following switching functions with four inputs, a, b, c, and d and four outputs, F1,F2,F3 and F4:

F1(a, b, c, d) = m (3, 4, 6, 9, 11) + d(7, 12)

F2(a, b, c, d) = m(2, 4, 8, 10, 11, 12) + d(6, 7, 9)

F3(a, b, c, d) = m(3, 6, 7, 10, 11) + d(4, 9, 12)

F4(a, b, c, d) = m(2, 6, 10, 11, 12) + d(4)

Design the switching using 3:8 DMUXs and minimal logic gates (the 3:8 DMUXs must

be designed using the 2:4 DMUXs*).