Hello can you help me please in solving those questions clearly with the explaination please?

Also , for the first question can I have the logic circuit please?

Assume that the VO address bus has 8 lines A7, A6, ..., A0 (A0 is the least significant bit) and consider the /O interface unit shown below. Assume that the system has 6 such I/O interface units. A. If the addresses assigned to the four interface registers of one of these interface units are 44 45, 46, and 47. Show the logic circuit connecting the address bus lines to the CS, RS1 and RSO inputs of the interface. B. In a different configuration of the above system, the CS input for each of the 6 interface units is connected to one of the high address lines (i.e., A2-A7), where A2 is connected to the first interface, A3 to the second, ..., and A7 to the sixth. The RS1 and RSO inputs lines for each interface are connected directly to Al and A0, respectively. Show the addresses of each of the following registers a. Port A of the first interface b. Port B of the second interface e. The Control Register of the fourth interface d. The Status Register of the fifth interface Port A Port B CS CPU RS Timing IO Device Control RsO and RD WR VO read Control CS RS1 RSO Register selected Port A register Port B register Control register Status