Hello, I'm trying to figure out this problem where I have some code given and need to figure out the scheduled instructions for the given MIPS code. Any help will be greatly appreciated. Thank you for your time.

2-issue processors. You are given the following code for a loop:

1. Loop: lw r1, 0(r6)

   lw r2, 4(r6)

   sub r3, r1, r2

   sw r3, 0(r7)

   addi r6, r6, 8

   addi r7, r7, 8

   addi r4, r4, 2

   bne r4, r0, loop

2. If the loop exits after executing only two iterations. Show the scheduled instructions for the given MIPS code on a 2-issue processor shown in Figure 4.69. Assume the processor has perfect branch prediction.

loop	ALU/branch	Load/store	cycle
1st iteration			1
			2
			3

2. Rearrange the code to achieve better performance on a 2-issue statically scheduled processor from Figure 4.69. Write the sequence below.

3. Repeat step a for the code from b.

loop	ALU/branch	Load/store	cycle
1st iteration			1
			2
			3