helpc$)$ A counting circuit under design receives an $8-$bit data $($Din$)$ every clock cycle $($valid from

negative$-$edge to next negative$-$edge of clock$).$ Each data represents an unsigned number. The

data are added, until the sum is $128($or $80$Hex $).$ The output count that gives the number of

data items received at the input Din before the total sum reaches $128.$

Draw the ASM$-$Chart for RTL modelling to know how many data items have been received

before the total sum reaches $128.[$Hits: On reset, the CU goes to the initial state, and begins

its operation when the go input is invoked. On completion, done signal is activated, signaling

that the count value is now valid.$]$