Question: Here is a basic question about systemverilog and Quartus 1.1 What is a top module? Does it have inputs and outputs? 1.2 Why is the

Here is a basic question about systemverilog and Quartus

1.1 What is a top module? Does it have inputs and outputs?

1.2 Why is the waveform viewer useful? When would you use it?

1.3 How do you know that you have successfully imported pin assignments? What happens if you do not successfully import pin assignments. Will you get an error message? Will you notice it if you do? Why or why not?

1.4 What happens if you instantiate a testbench in your Quartus project and try to compile? Why?

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