Here is a series of memory address references given as word address: $1,1,4,4,8,5,20,17,19,56,9,11,4,$

$43,5,6,9,17,32,4,22.$ Assuming a direct$-$mapped cache with $16$ one$-$word blocks that is initially empty, label

each memory reference in the list as a hit or miss and show the final contents of the cache $($valid bit, tag and

data$)$ by filling the following two tables. Assume memory address is $6-$bit long. What is the miss rate of the

cache?

Miss rate $=$