Hi , i need answer for this question , computer organisation and architecture

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5). Provide this 8-bit CPU with a 64Kbyte memory space by making use of 16K4 memory chips like the ones provided in the figure below. (a) Fill in the blanks beside and inside the memory chips with the appropriate numbers. The number on top of this symbol represents the number of lines on that bus. The spaces besides the s and the D's are to indicate which lines of the address and data busses are connected to each chip, respectively. [7 pts] (b) Complete the connections in the figure below adding logic gates where needed to produce the chip select ( CS) signals needed in the decoding logic. Explain the reasons for the connections made, include expressions for the Boolean logic used. [7 pts] (c) Provide the address range allocated to each of the chips used. [6 pts] Note: R/W \& clock signals are omitted for simplicity